library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity sd_card_clk is 
port (

clk 		: 	in std_logic;
write 		: 	in std_logic;
chipselect 	:   	in std_logic;
address		:	in  unsigned(7 downto 0);
writedata  	: 	in  unsigned(31 downto 0);

CARD_CLK	:  out std_logic
);

end sd_card_clk;

architecture card of sd_card_clk is
begin
  process(clk)
 begin
  if clk'event and clk ='1' then
    if chipselect = '1' then
		if write = '1' then
			CARD_CLK <= writedata(0);
		end if;
	end if;
  end if;
end process;
end architecture card;			
		
